The present invention relates to image processing, and more particularly to an image processing system that provides continuous uninterrupted access to non-aligned sections of a variable length data item to multiple image processing units using a common bus.
Image processing denotes the performance of various functions on an image or set of images, such as compression, encryption, encoding, decoding, searching or feature recognition, image or color enhancement, resolution or size reduction, etc. A primary challenge for image processing hardware is to maintain performance at reasonable or reduced cost.
Various algorithms are known for image processing depending upon the particular technology. For facsimile or printer technologies, for example, image compression is desirable to reduce image data for purposes of transmission or storage. Some algorithms, such as raster image processing, involve processing a pixel or a group of pixels based upon one or more neighboring pixels, otherwise referred to as xe2x80x9ccontextxe2x80x9d for the pixel. For example, the CCITT recommendation T.6 or xe2x80x9cGroup IVxe2x80x9d utilizes the Modified READ (MR) and Modified MR (MMR) compression algorithms that determine redundancy within each line and between adjacent lines of a bi-level image. The Group IV standard has been used for facsimile technology. The Joint Bi-level Image experts Group (JBIG) compression method is a newer standard that is intended to replace Group IV. JBIG processes each pixel by determining if the pixel may be predicted by one of two selectable prediction schemes and if not, coding the value arithmetically. Performing these tasks requires the value of the group neighboring pixels or context to be determined where the selection of the pixels for the context depends upon the particular task.
As the pixels in an image line are processed according to the JBIG algorithm, the context for both of the prediction schemes and the arithmetic coder need to be determined continuously. Delay in retrieving context data translates into a reduced level of performance. Hardware implementations of particular coders, such as implementations configured according to JBIG, are constrained to use data buses that are much smaller than potential image line sizes. Thus, the processing units that perform the prediction and arithmetic coding are constrained to obtain the context from a fixed-size data bus.
Similar problems exist for any practical image processing system that includes multiple image processing units coupled to a common, fixed-size bus. As the image is processed, the data on the bus must be updated as progress is made. For performance reasons, it is highly desirable that processing is not interrupted by bus updates. Furthermore, bus updates must not occur before all processing units are ready.